Phoenix ROM BIOS PLUS / PhoenixBIOS 1.xx POST/BEEP Codes

 

The Phoenix BIOS will issue an audible beep code in the event of a system error encountered during the Power On Self Test (POST). A numeric value is also sent to port 80h representing the current state of the POST. In the event of a fatal system error during initialization, the code representing the portion of the POST causing the failure will be the last value sent to port 80h.

The code at port 80h is used by plug-in diagnostic boards that decode the contents of the port address and displays the numeric value on an LED display. These diagnostic boards are available from a number of vendors.

As any experienced technician knows, a failure at any given location does not necessarily mean that the particular part or section under test has actually failed. For example, any problem with the motherboard address lines or local bus can cause the CMOS read/write test to fail, even though the CMOS RAM may work perfectly.

If you require further details or assistance in dealing with a fatal system board error, please do not contact Micro Firmware. You need to seek the assistance of a qualified computer service technician in your area.

This POST/BEEP code list is applicable only to Phoenix ROM BIOS PLUS or PhoenixBIOS A286/A386/A486 Version 1.xx on an AT-class (80286 or higher) system. For PhoenixBIOS 4.x, please see BEEP4.TXT.

 

Port
80h    Beep 
Value  Code    Error/Test Description
-----  -----   ------------------------
01h    none    80286 register test in progress
02h    1-1-3   CMOS write/read test in progress or failure
03h    1-1-4   BIOS ROM checksum in progress or failure
04h    1-2-1   Programmable Interval Timer test in progress or failure
05h    1-2-2   DMA initialization in progress or failure
06h    1-2-3   DMA page register write/read test in progress or fail
08h    1-3-1   RAM refresh verification in progress or failure
09h    none    1st 64K RAM test in progress
0Ah    1-3-3   1st 64K RAM chip or data line failure - multi-bit
0Bh    1-3-4   1st 64K RAM odd/even logic failure
0Ch    1-4-1   1st 64K RAM address line failure
0Dh    1-4-2   1st 64K RAM parity test in progress or failure
10h    2-1-1   1st 64K RAM chip or data line failure - bit 0
11h    2-1-2   1st 64K RAM chip or data line failure - bit 1
12h    2-1-3   1st 64K RAM chip or data line failure - bit 2
13h    2-1-4   1st 64K RAM chip or data line failure - bit 3
14h    2-2-1   1st 64K RAM chip or data line failure - bit 4
15h    2-2-2   1st 64K RAM chip or data line failure - bit 5
16h    2-2-3   1st 64K RAM chip or data line failure - bit 6
17h    2-2-4   1st 64K RAM chip or data line failure - bit 7
18h    2-3-1   1st 64K RAM chip or data line failure - bit 8
19h    2-3-2   1st 64K RAM chip or data line failure - bit 9
1Ah    2-3-3   1st 64K RAM chip or data line failure - bit A
1Bh    2-3-4   1st 64K RAM chip or data line failure - bit B
1Ch    2-4-1   1st 64K RAM chip or data line failure - bit C
1Dh    2-4-2   1st 64K RAM chip or data line failure - bit D
1Eh    2-4-3   1st 64K RAM chip or data line failure - bit E
1Fh    2-4-4   1st 64K RAM chip or data line failure - bit F
20h    3-1-1   master DMA register test in progress or failure
21h    3-1-2   slave DMA register test in progress or failure
22h    3-1-3   master interrupt mask register test in progress or fail
23h    3-1-4   slave interrupt mask register test in progress or fail
25h    none    interrupt vector loading in progress
27h    3-2-4   keyboard controller test in progress or failure
28h    none    CMOS power-fail and checksum checks in progress
29h    none    CMOS config info validation in progress
2Bh    3-3-4   screen memory test in progress or failure
2Ch    3-4-1   screen initialization in progress or failure
2Dh    3-4-2   screen retrace tests in progress or failure
2Eh    none    search for video ROM in progress
30h    none    screen believed operable:
30h    none    screen believed running w/ video ROM
31h    none    monochromatic screen believed operable
32h    none    40-column color screen believed operable
33h    none    80-column color screen believed operable
34h    4-2-1   timer tick interrupt test in progress or failure
35h    4-2-2   shutdown test in progress or failure
36h    4-2-3   gate A20 failure
37h    4-2-4   unexpected interrupt in protected mode
38h    4-3-1   RAM test in progress or failure above address 0FFFFh
3Ah    4-3-3   Interval timer channel 2 test in progress or failure
3Bh    4-3-4   Time-Of-Day clock test in progress or failure
3Ch    4-4-1   Serial port test in progress or failure
3Dh    4-4-2   Parallel port test in progress or failure
3Eh    4-4-3   Math Coprocessor test in progress or failure

Error codes in the 50h range or beyond are chip set or custom platform specific, and will vary from system to system. Contact your system manufacturer for details.

 

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While every attempt is made to ensure the accuracy of our support documents, Micro Firmware provides these documents on an AS-IS basis for information purposes only.